Contribute to the development of an innovative communication platform and gain hands-on experience in a fast-paced tech environment. 🎯 About the Role This remote internship…
Design Testability Engineer (DFT)
- Location
- Hyderabad, Telangana, India
- Posted
- Status
- Open
About this role
Join a growing VLSI/ASIC design team and work on cutting-edge semiconductor projects.
🎯 About the Role
EdgeSilica is seeking experienced DFT Engineers to contribute to challenging VLSI/ASIC design projects. This onsite role involves DFT architecture, implementation, scan insertion, ATPG, and test strategy development.
🛠️ Key Responsibilities
- 🏗️ DFT architecture and implementation.
- ✂️ Scan insertion and ATPG.
- 📈 Test strategy and test pattern generation.
- ✅ DFT verification and related activities.
✅ Requirements & Skills
- ⭐ Strong DFT experience.
- 💡 Experience in VLSI/ASIC design projects.
🎁 Perks & Benefits
- Not specified
💰 Stipend: Not specified
⏳ Duration: Not specified
📍 Location: Hyderabad – Onsite
📩 How to Apply
- ⭐ If you have strong DFT experience and are looking for a challenging opportunity, we'd love to hear from you.
How to apply
Applications are handled on in.linkedin.com, not here. The link below opens the original posting.
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