ASIC Architect/Engineering Intern

Make your mark on purposeful and enduring innovation by joining the architecture team developing essential semiconductor solutions for the data infrastructure.

🎯 About the Role

This role involves defining chip architectures for innovative datacenter products, engaging with both customers and internal technology teams. You will contribute to silicon partitioning strategy, IP definition, and present solutions to key stakeholders, learning how to build and test advanced custom silicon.

🛠️ Key Responsibilities

• 💡 Help define chip architectures of innovative and complex datacenter products.
• 🧩 Identify the best silicon partitioning, IP selection, and packaging technology.
• 📊 Map Marvell solutions into highly effective presentations for customers.
• 🤝 Communicate and coordinate with other business units on internal IP.
• 📝 Document findings and present results to the team.

✅ Requirements & Skills

• 🎓 Currently pursuing a Master’s Degree in Electrical Engineering, Computer Engineering, or a related field.
• 📅 Expected graduation date between Fall 2027 – Summer 2028.
• 🧠 Experience with or knowledge of system architectures for datacenter products (appreciated).
• 💻 Knowledge of CMOS technology and physical design flow.
• 🗣️ Excellent problem-solving and communication skills.

🎁 Perks & Benefits

• 🏥 Medical, dental, and vision coverage.
• 🌟 Perks and discounts, robust mental health resources.
• 🗓️ Paid holidays.
• 💰 Additional compensation may be available for intern PhD candidates.

💰 Compensation: $31 - $62 per hour

📍 Location: United States